#include <cspieeprom.h>


Public Member Functions | |
| CSPIEEPROM () | |
| CMachine::bit32 | read (CMachine::ubit32 address, CMachine::ubit8 *buffer, CMachine::ubit32 length) |
| read from the device. | |
| CMachine::bit32 | write (CMachine::ubit32 address, CMachine::ubit8 *buffer, CMachine::ubit32 length) |
| write to the device. | |
| void | writeDisable () |
| write disable. | |
| void | writeEnable () |
| write enable. | |
| virtual | ~CSPIEEPROM () |
Protected Types | |
| enum | Instruction { InstructionREAD = 0x03, InstructionWRITE = 0x02, InstructionWREN = 0x06, InstructionWRDI = 0x04, InstructionRDSR = 0x05, InstructionWRSR = 0x01, InstructionPE = 0x42, InstructionSE = 0xD8, InstructionCE = 0xC7, InstructionRDID = 0xAB, InstructionDPD = 0xB9 } |
Private Member Functions | |
| CMachine::bit32 | _write (CMachine::ubit32 address, CMachine::ubit8 *buffer, CMachine::ubit32 length) |
| (private) write to the device - assumes address and length are within page boundary - 25LC1024 requires write operation to stay within 256 byte page boundary. | |
| void | disableHold () |
| void | enableHold () |
| void | functionEnter () |
| void | functionExit () |
Definition at line 35 of file cspieeprom.h.
enum PikeAero::CSPIEEPROM::Instruction [protected] |
Definition at line 64 of file cspieeprom.h.
00065 { 00066 InstructionREAD = 0x03, /** Read data from memory array beginning at selected address. */ 00067 InstructionWRITE = 0x02, /** Write data to memory array beginning at selected address. */ 00068 InstructionWREN = 0x06, /** Set the write enable latch (enable write operations). */ 00069 InstructionWRDI = 0x04, /** Reset the write enable latch (disable write operations). */ 00070 InstructionRDSR = 0x05, /** Read STATUS register. */ 00071 InstructionWRSR = 0x01, /** Write STATUS register. */ 00072 InstructionPE = 0x42, /** Page Erase - erase one page in memory array. */ 00073 InstructionSE = 0xD8, /** Sector Erase - erase one sector in memory array. */ 00074 InstructionCE = 0xC7, /** Chip Erase - erase all sectors in memory array. */ 00075 InstructionRDID = 0xAB, /** Release from Deep power-down and read electronic signature. */ 00076 InstructionDPD = 0xB9, /** Deep Power-Down mode. */ 00077 } Instruction;
| PikeAero::CSPIEEPROM::CSPIEEPROM | ( | ) |
| PikeAero::CSPIEEPROM::~CSPIEEPROM | ( | ) | [virtual] |
| CMachine::bit32 PikeAero::CSPIEEPROM::_write | ( | CMachine::ubit32 | address, | |
| CMachine::ubit8 * | buffer, | |||
| CMachine::ubit32 | length | |||
| ) | [private] |
(private) write to the device - assumes address and length are within page boundary - 25LC1024 requires write operation to stay within 256 byte page boundary.
lock the mutex
write enable and chip select
Transmit the READ instruction...
Transmit the 24 bit address MSB first...
empty out the receiver...
set the recieve buffer address and clock in the data...
start the transfer by disableing receiver interrupts first, then enabling transmitter interrupts. the transfer will start at the first transmit buffer empty interrupt.
nothing to receive
wait for the transfer to complete...
disable chip select and deassert write enable
Definition at line 110 of file cspieeprom.cpp.
References PikeAero::CSPI::clearReceiver(), PikeAero::CSPI::disableRXInterrupts(), PikeAero::CSPI::enableChipSelect(), PikeAero::CSPI::enableTXInterrupts(), functionEnter(), functionExit(), GPIO_PIN_2, InstructionWRITE, PikeAero::CSPI::mRXBuffer, PikeAero::CSPI::mRXCount, PikeAero::CSPI::mTXBuffer, PikeAero::CSPI::mTXCount, PikeAero::CMachine::mutexBSPI2(), PikeAero::CSPI::tx(), writeDisable(), writeEnable(), and PikeAero::CTaskScheduler::yield().
Referenced by write().
00111 { 00112 /** lock the mutex */ 00113 CMutexLock lock(CMachine::mutexBSPI2()); 00114 00115 /** write enable and chip select */ 00116 functionEnter(); 00117 writeEnable(); 00118 enableChipSelect( GPIO_PIN_2 ); 00119 00120 /** Transmit the READ instruction... */ 00121 tx( InstructionWRITE ); 00122 00123 /** Transmit the 24 bit address MSB first... */ 00124 tx( (address >> 16) & 0xFF ); 00125 tx( (address >> 8) & 0xFF ); 00126 tx( address & 0xFF ); 00127 00128 /** empty out the receiver... */ 00129 clearReceiver(); 00130 00131 /** set the recieve buffer address and clock in the data... */ 00132 mRXBuffer = NULL; 00133 mTXBuffer = buffer; 00134 mRXCount = 0; 00135 mTXCount = length; 00136 00137 /** 00138 ** start the transfer by disableing receiver interrupts first, then enabling transmitter interrupts. 00139 ** the transfer will start at the first transmit buffer empty interrupt. 00140 */ 00141 disableRXInterrupts(); /** nothing to receive */ 00142 enableTXInterrupts(); 00143 00144 /** wait for the transfer to complete... */ 00145 while ( mTXCount ) CTaskScheduler::yield(); 00146 00147 /** disable chip select and deassert write enable */ 00148 functionExit(); 00149 writeDisable(); 00150 00151 return length; 00152 }


| void PikeAero::CSPIEEPROM::disableHold | ( | ) | [inline, private] |
Definition at line 81 of file cspieeprom.h.
References GPIO6, and GPIO_PIN_2.
00081 { GPIO6->PD |= GPIO_PIN_2; }
| void PikeAero::CSPIEEPROM::enableHold | ( | ) | [inline, private] |
Definition at line 80 of file cspieeprom.h.
References GPIO6, and GPIO_PIN_2.
00080 { GPIO6->PD &= ~GPIO_PIN_2; }
| void PikeAero::CSPIEEPROM::functionEnter | ( | ) | [private] |
Activate chip select
disable MCP6S28 CS
enable 25LC1024 CS
make sure we don't get any interrupts for now...
Definition at line 37 of file cspieeprom.cpp.
References PikeAero::CSPI::disableChipSelect(), PikeAero::CSPI::disableRXInterrupts(), PikeAero::CSPI::disableTXInterrupts(), PikeAero::CSPI::enableChipSelect(), GPIO_PIN_2, and GPIO_PIN_3.
Referenced by _write(), and read().
00038 { 00039 /** Activate chip select */ 00040 disableChipSelect( GPIO_PIN_3 ); /** disable MCP6S28 CS */ 00041 enableChipSelect( GPIO_PIN_2 ); /** enable 25LC1024 CS */ 00042 00043 /** make sure we don't get any interrupts for now... */ 00044 disableTXInterrupts(); 00045 disableRXInterrupts(); 00046 }


| void PikeAero::CSPIEEPROM::functionExit | ( | ) | [private] |
don't leave interrupts dangling...
tidy up...
Deactivate chip select
disable 25LC1024 CS
Definition at line 48 of file cspieeprom.cpp.
References PikeAero::CSPI::disableChipSelect(), PikeAero::CSPI::disableRXInterrupts(), PikeAero::CSPI::disableTXInterrupts(), GPIO_PIN_2, PikeAero::CSPI::mRXBuffer, PikeAero::CSPI::mTXBuffer, and PikeAero::CSPI::mTXCount.
Referenced by _write(), and read().
00049 { 00050 /** don't leave interrupts dangling... */ 00051 disableTXInterrupts(); 00052 disableRXInterrupts(); 00053 00054 /** tidy up... */ 00055 mRXBuffer = NULL; 00056 mTXBuffer = NULL; 00057 mTXCount = 0; 00058 00059 /** Deactivate chip select */ 00060 disableChipSelect( GPIO_PIN_2 ); /** disable 25LC1024 CS */ 00061 }


| CMachine::bit32 PikeAero::CSPIEEPROM::read | ( | CMachine::ubit32 | address, | |
| CMachine::ubit8 * | buffer, | |||
| CMachine::ubit32 | length | |||
| ) |
read from the device.
lock the mutex
Transmit the READ instruction...
Transmit the 24 bit address MSB first...
empty out the receiver...
set the recieve buffer address and clock in the data...
start the transfer by enabling receiver interrupts first, then transmitter interrupts. the transfer will start at the first transmit buffer empty interrupt.
wait for the transfer to complete...
Definition at line 158 of file cspieeprom.cpp.
References PikeAero::CSPI::clearReceiver(), PikeAero::CSPI::enableRXInterrupts(), PikeAero::CSPI::enableTXInterrupts(), functionEnter(), functionExit(), InstructionREAD, PikeAero::CSPI::mRXBuffer, PikeAero::CSPI::mRXCount, PikeAero::CSPI::mTXBuffer, PikeAero::CSPI::mTXCount, PikeAero::CMachine::mutexBSPI2(), PikeAero::CSPI::tx(), and PikeAero::CTaskScheduler::yield().
Referenced by PikeAero::CConfigurationAlternate::getUBit16(), PikeAero::CConfigurationAlternate::getUBit32(), and PikeAero::CConfigurationAlternate::getUBit8().
00159 { 00160 /** lock the mutex */ 00161 CMutexLock lock(CMachine::mutexBSPI2()); 00162 00163 functionEnter(); 00164 00165 /** Transmit the READ instruction... */ 00166 tx( InstructionREAD ); 00167 00168 /** Transmit the 24 bit address MSB first... */ 00169 tx( (address >> 16) & 0xFF ); 00170 tx( (address >> 8) & 0xFF ); 00171 tx( address & 0xFF ); 00172 00173 /** empty out the receiver... */ 00174 clearReceiver(); 00175 00176 /** set the recieve buffer address and clock in the data... */ 00177 mRXBuffer = buffer; 00178 mTXBuffer = NULL; 00179 mRXCount = 0; 00180 mTXCount = length; 00181 00182 /** 00183 ** start the transfer by enabling receiver interrupts first, then transmitter interrupts. 00184 ** the transfer will start at the first transmit buffer empty interrupt. 00185 */ 00186 enableRXInterrupts(); 00187 enableTXInterrupts(); 00188 00189 /** wait for the transfer to complete... */ 00190 while ( mTXCount ) CTaskScheduler::yield(); 00191 00192 functionExit(); 00193 00194 return length; 00195 }


| CMachine::bit32 PikeAero::CSPIEEPROM::write | ( | CMachine::ubit32 | address, | |
| CMachine::ubit8 * | buffer, | |||
| CMachine::ubit32 | length | |||
| ) |
write to the device.
(public) write to the device - splits address and length into individual page boundary write operations.
Definition at line 90 of file cspieeprom.cpp.
References _write().
Referenced by PikeAero::CConfigurationAlternate::setUBit16(), PikeAero::CConfigurationAlternate::setUBit32(), and PikeAero::CConfigurationAlternate::setUBit8().
00091 { 00092 CMachine::bit32 rc = 0; 00093 CMachine::bit32 pages = (((address&0xFF)+length)/256)+1; 00094 CMachine::ubit32 pageWriteLength = (0xFF-(address&0xFF)) <= length ? length : (0xFF-(address&0xFF))+1; 00095 for( CMachine::bit32 page = 0; page < pages; page++ ) 00096 { 00097 rc += _write( address, buffer, pageWriteLength ); 00098 address += pageWriteLength; 00099 buffer += pageWriteLength; 00100 length -= pageWriteLength; 00101 pageWriteLength = (length <= 0xFF) ? length : 0xFF; 00102 } 00103 return rc; 00104 }


| void PikeAero::CSPIEEPROM::writeDisable | ( | ) |
write disable.
enable 25LC1024 CS
raise WP pin
Definition at line 77 of file cspieeprom.cpp.
References PikeAero::CSPI::disableChipSelect(), PikeAero::CSPI::enableChipSelect(), GPIO6, GPIO_PIN_2, GPIO_PIN_4, InstructionWRDI, and PikeAero::CSPI::tx().
Referenced by _write().
00078 { 00079 enableChipSelect( GPIO_PIN_2 ); /** enable 25LC1024 CS */ 00080 tx( InstructionWRDI ); 00081 disableChipSelect( GPIO_PIN_2 ); 00082 GPIO6->PD |= GPIO_PIN_4; /** raise WP pin */ 00083 }


| void PikeAero::CSPIEEPROM::writeEnable | ( | ) |
write enable.
lower WP pin
enable 25LC1024 CS
Definition at line 66 of file cspieeprom.cpp.
References PikeAero::CSPI::disableChipSelect(), PikeAero::CSPI::enableChipSelect(), GPIO6, GPIO_PIN_2, GPIO_PIN_4, InstructionWREN, and PikeAero::CSPI::tx().
Referenced by _write().
00067 { 00068 GPIO6->PD &= ~GPIO_PIN_4; /** lower WP pin */ 00069 enableChipSelect( GPIO_PIN_2 ); /** enable 25LC1024 CS */ 00070 tx( InstructionWREN ); 00071 disableChipSelect( GPIO_PIN_2 ); 00072 }


1.5.8